Video interfaces

 

We are offering individual support and technical know-how combined with competitive pricing and reliable long-term supply on Interconnectivity SoCs for HDMI Repeater,  HDMI Receiver / Transmitter, MHL ,SRE,  MIPI, DP/ eDP, IDP, LVDS/ cLVDS, OSD, DVI & HDCP, HDMI ARC, Controller/ MCU

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Description

The EP103 LVDS transmitter supports transmission between the host and the flat panel display up to SXGA+ resolutions. The transmitter converts 3×10 bits of Low Voltage TTL data and 3 control bits into 4 LVDS (Low Voltage Differential Signal) data streams. At a maximum input clock rate of 135MHz, each LVDS differential data pair speed is 945Mbps, providing a total throughput of 3.78Gbps. The transmitter can be configured to input clock rising edge or falling edge strobe through an external pin.

  • Support 10MHz to 135MHz clock rates for HVGA to SXGA+ resolution
  • Up to 3.78Gbps bandwidth •PLL requires no external components
  • Cycle-to-cycle jitter rejection •3.3V to 1.8V Low Voltage TTL tolerant Input
  • Programmable data and control strobe select
  • Power down mode supported
  • LQFP-64 package

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