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Description

EP91A6S is an HDMI 2.0 1-IN 1-OUT Repeater with HDCP 2.2. It is suitable for Home Bar Speaker applications. The chip supports 1 HDMI input port and 1 HDMI output port. The chip supports HDCP decryption, audio outputs, audio inputs and HDCP re-encryption in repeater mode. The chip also supports HDCP 1.4 to HDCP 2.2 and HDCP 2.2 to HDCP 1.4 conversions.
The chip supports 6G to 3G conversion that conver the YCC444 to YCC420. It can convert the 4K2K 60Hz YCC444 format to the 4K2K 60Hz YCC420 format to reduce the bandwidth.
The chip supports Audio Outputs in IIS and SPDIF. The audio for the HDMI output can be from a regenerated LPCM audio source (input from IIS_*_IN pins) or the by-passed audio from the selected HDMI input port. The chip supports SD/HD Audio and HD/3D/4K2K Video up to 60 Hz frame rate. The chip also supports ARC (Audio Return Channel) Receiver and Transmitter.
The chip is also integrated with an eFlash MCU to make user’s applications very easy.
 

Features

•On-chip 6GHz 1-IN 1-OUT HDMI Repeater with Equalizer
•Support Single 6G 444 to Single 3G YCC420 conversion up to 4k2k 60 Hz frame rate.
•On-chip eFlash MCU with integrated HDCP keys and EDID memory
•Support wide Frequency Range: 25MHz - 600MHz TMDS clock
•Support Jitter Clean capability for more cascadable stages
•On-chip HDMI Receiver and Transmitter core which are compliant with HDMI 1.4/2.0 specification
•Support HDCP 1.4 to HDCP 2.2 conversion.
•Support HDCP 2.2 to HDCP 1.4 conversion.
•On-chip HDCP Engine which supports Repeater and is compliant with HDCP 1.4/2.2 specification
•Support ARC (Audio Return Channel) Receiving or Transmitting.
•Audio for HDMI output can be from a regenerated LPCM audio source or the by-passed audio from the selected HDMI input port.
•On-chip Audio Decoder which support 8-channel IIS/DSD and SPDIF audio outputs
•Supports Standard Audio, DSD Audio and HD (HBR) Audio
•Supports audio soft mute
•Controllable tri-state for Audio output pins
•Source Signal Detection in Low Power mode
•Low stand-by current at power down mode
•100-pin TQFP package
 

Block Diagram

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