USB to LAN

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Description

The AX88772B Low-power USB 2.0 to 10/100M Fast Ethernet controller is a high performance and highly integrated ASIC which enables a low cost, small form factor, and simple plug-and-play Fast Ethernet network connection capability for desktops, notebook PC's, Ultra-Mobile PC's, docking stations, game consoles, digital-home appliances, and any embedded system using a standard USB port. The AX88772B features a USB interface to communicate with a USB Host Controller and is compliant with USB specification V1.1 and V2.0. The AX88772B implements 10/100Mbps Ethernet LAN function based on IEEE802.3 and IEEE802.3u standards with embedded SRAM for packet buffering. The AX88772B integrates an on-chip 10/100Mbps Ethernet PHY to simplify system design. The AX88772B provides an optional Multi-Function-Bus portion A and B (MFA and MFB) for external PHY or external MAC for different application purposes. The MFA/MFB can be a reduce-media-independent interface (RMII) for implementing HomePlug, HomePNA, etc. functions. The MFA/MFB can also be a Reverse Reduced-MII (Reverse-RMII) for glueless MAC-to-MAC connections to any MCU with Ethernet MAC RMII interface. In addition, the MFA/MFB can be configured as general purpose I/O. Single chip USB 2.0 to 10/100M Fast Ethernet controller Single chip USB 2.0 to RMII, support HomePNATM and HomePlug PHY Single chip USB 2.0 to Reverse-RMII, supports glueless MAC-to-MAC connections USB Device Interface Integrates on-chip USB 2.0 transceiver and SIE compliant to USB Spec 1.1 and 2.0 Supports USB Full and High Speed modes with Bus-Power or Self-Power capability Supports 4 or 6 programmable endpoints on USB interface Supports AutoDetach power saving, Detach from USB host when Ethernet cable is unplugged High performance packet transfer rate over USB bus using proprietary burst transfer mechanism (US Patent Approval) Fast Ethernet Controller Integrates 10/100Mbps Fast Ethernet MAC/PHY IEEE 802.3 10Base-T/100Base-TX compatible IEEE 802.3 100BASE-FX compatible Supports twisted pair crossover detection and auto-correction (HP Auto-MDIX) Embedded SRAM for RX/TX packet buffering Supports IPv4/ IPv6 packet Checksum Offload Engine to reduce CPU loading, including IPv4 IP/TCP/UDP/ICMP/IGMP & IPv6 TCP/UDP/ICMPv6 checksum check & generation Supports full duplex operation with IEEE 802.3x flow control and half duplex operation with back-pressure flow control Supports 2 VLAN ID filtering, received VLAN Tag (4 bytes) can be stripped off or preserved PHY loop-back diagnostic capability Support Wake-on-LAN Function Supports Suspend Mode and Remote Wakeup via Link-change, Magic packet, MS wakeup frame and external wakeup pin Supports Protocol Offloads (ARP & NS) for Windows 7 Networking Power Management Optional PHY power down during Suspend mode Versatile External Media Interface Optional RMII interface in MAC mode allows AX88772B to work with HomePNA and HomePlug PHY Optional Reverse-RMII interface in PHY mode allows AX88772B to support glueless MAC-to-MAC connections Advanced Power Management Features Supports dynamic power management to reduce power dissipation during idle or light traffic period Supports very low power Wake-on-LAN (WOL) mode when the system enters suspend mode and waits for network event to awake it up Supports 256/512 bytes (93c56/93c66) of serial EEPROM (for storing USB Descriptors) Supports embedded ID SRAM (online programmable memory for USB Device Descriptors ,etc) to save external EEPROM Supports automatic loading of Ethernet ID, USB Descriptors and Adapter Configuration from EEPROM after power-on initialization Integrates on-chip voltage regulator and only requires a single 3.3V power supply Single 25MHz clock input from either crystal or oscillator source Integrates on-chip power-on reset circuit Small form factor with 64-pin LQFP RoHS compliant package Operating over 0°C to 70°C or -40 to +85°C temperature range

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